Gen6 HYDRA - PCIe 8-bay Passive E3 JBOF
Product Description
Gen6 PCIe/CXL HYDRA - 8-bay Passive E3 JBOF
Serial Cables Hydra: Gen6 JBOF for PCIe, NVMe & CXL Validation
The Hydra is Serial Cables’ industry-first Gen6, 8-bay passive E3 JBOF designed for PCIe, NVMe, and CXL validation. Built to support all E3 drive lengths and heights, Hydra brings high-speed testing into a compact, controlled environment with advanced power control, airflow management, and full Gen6 signal integrity. Its paddle-card architecture ensures clean connectivity across all eight drives while maintaining robust sideband signaling with both I²C and I³C host support.
Each slot features independent power control through the onboard microcontroller and CLI, with optional integration of Quarch power modules and per-slot breaker capability. (Sold Separately)
Fan power and speed are also software-controlled, enabling fine-tuned thermal management and repeatable test conditions.
Hydra integrates seamlessly with the Quarch Power Analysis Module via a dedicated mezzanine board mounted directly onto one of the internal paddle cards. This configuration enables accurate signal and power analysis without disturbing the primary data path. Quarch integration requires additional hardware purchase, including compatible power modules and connection accessories.
A Python-based UI, CLI, and API framework extend Hydra into a full automation toolchain. With Hydra, validation moves off the open bench and into a unified, automation-ready system built for next-generation PCIe Gen6 and CXL development.
Architecture & Form Factor
- 8 -bay passive Gen6 x8 EDSFF JBOF for PCIe/NVMe & CXL
- EDSFF form-factor support: E3S 2T, E3L, E3L 2T
- Individual paddle card design, eliminates SI issues
- Paddle card configurations with Quarch PAM & Breakers integration
Connectivity
- 8 x8 Gen6 MCIO connectors directly to each slot
- Sideband signaling: I²C with MCTP & I³C MCTP-MI
- Supports more devices, faster polling, and improved device discovery over I²C
Power and Cooling
- 500 W PSU with staggered power-up sequencing
- Dual 36CFM fans with CLI fan speed control
- Front panel LEDs: presence, activity, pass/fail, error
mCPU Management & CLI Telemetry
- Fan on/off and RPM adjustment
- Individual slot power on/off, reset (PERST#), disable
- Temperature, current, and voltage monitoring per slot
- Slot width/speed negotiation monitoring
- SSD power monitoring and dual-port support
- Firmware-updatable mCPU
- Software utility (Linux): GUI for visualization or Python library for automation
Hydra API
Python Library for Gen6 JBOF Control and NVMe Validation
The Hydra API delivers full programmatic access to Serial Cables' Gen6 8-bay JBOF, enabling automated NVMe and CXL device validation from Python scripts, CLI, or your existing test framework.
Key Capabilities:
- Slot Control — Manage per-slot power sequencing, hot-plug simulation, and EDSFF presence detection across all eight bays
- Thermal Management — Monitor SSD temperatures and control dual-fan RPM for consistent test conditions
- Power Telemetry — Track real-time current draw and voltage rails at the slot and enclosure level
- NVMe-MI / MCTP — Execute sideband commands directly for out-of-band device management and diagnostics
- Coming Soon — Companion Sphinx API specifically for NVMe/MI over MCTP with full encode/decode capabilities to match the NVMe-MI 1.2/2.x specifications using the Hydra API as the Transport Layer
- LED Control — Drive front-panel activity, error, and pass/fail indicators for visual test status
- Telemetry Export — Stream or log power, thermal, and link data for regression analysis and compliance reporting
- Extensible with QuarchPy — For Quarch PAM or Breaker mezzanine-equipped paddle cards, combine this API with QuarchPy for precise per-slot power analysis and controlled fault injection
Supports E3.S 2T, E3.L, and E3.L 2T form factors. Integrates seamlessly with Atlas3 switch and Hermes Redriver APIs for end-to-end PCIe Gen6 test automation.
To Install:
pip install serialcables-hydra
